Part Number Hot Search : 
4069UBF AK4392EQ SM5122 RT424F24 C105M SP802LCN ILD207 KA3843A
Product Description
Full Text Search
 

To Download HM62W8511H Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 HM62W8511H Series
4M High Speed SRAM (512-kword x 8-bit)
ADE-203-750D (Z) Rev. 1.0 Sep. 15, 1998 Description
The HM62W8511H is a 4-Mbit high speed static RAM organized 512-kword x 8-bit. It has realized high speed access time by employing CMOS process (4-transistor + 2-poly resistor memory cell) and high speed circuit designing technology. It is most appropriate for the application which requires high speed, high density memory and wide bit width configuration, such as cache and buffer memory in system. The HM62W8511H is packaged in 400-mil 36-pin SOJ for high density surface mounting.
Features
* Single supply : 3.3 V 0.3 V * Access time 12/15 ns (max) * Completely static memory No clock or timing strobe required * Equal access and cycle times * Directly TTL compatible All inputs and outputs * Operating current : 150/130 mA (max) * TTL standby current : 60/50 mA (max) * CMOS standby current : 5 mA (max) : 1 mA (max) (L-version) * Data retension current : 0.6 mA (max) (L-version) * Data retension voltage : 2 V (min) (L-version) * Center VCC and VSS type pinout
HM62W8511H Series
Ordering Information
Type No. HM62W8511HJP-12 HM62W8511HJP-15 HM62W8511HLJP-12 HM62W8511HLJP-15 Access time 12 ns 15 ns 12 ns 15 ns Package 400-mil 36-pin plastic SOJ (CP-36D)
Pin Arrangement
HM62W8511HJP/HLJP Series A0 A1 A2 A3 A4 CS I/O1 I/O2 VCC VSS I/O3 I/O4 WE A5 A6 A7 A8 A9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 (Top View) 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 NC A18 A17 A16 A15 OE I/O8 I/O7 VSS VCC I/O6 I/O5 A14 A13 A12 A11 A10 NC
2
HM62W8511H Series
Pin Description
Pin name A0 to A18 I/O1 to I/O8 CS OE WE VCC VSS NC Function Address input Data input/output Chip select Output enable Write enable Power supply Ground No connection
Block Diagram
(LSB) A1 A17 A7 A11 A16 A2 A6 A5 (MSB)
VCC Row decoder Memory matrix 256 rows x 8 columns x 256 blocks x 8 bit (4,194,304 bits) VSS
CS I/O1 . . . I/O8 Column I/O Input data control Column decoder CS
WE CS
A10 A8 A9 A12 A13 A14 A0 A18 A15 A3 A4 (LSB) (MSB)
OE CS
3
HM62W8511H Series
Operation Table
CS H L L L L Note: OE x H L H L x: H or L WE x H H L L Mode Standby Output disable Read Write Write VCC current I SB , I SB1 I CC I CC I CC I CC I/O High-Z High-Z Dout Din Din Ref. cycle -- -- Read cycle (1) to (3) Write cycle (1) Write cycle (2)
Absolute Maximum Ratings
Parameter Supply voltage relative to VSS Voltage on any pin relative to V SS Power dissipation Operating temperature Storage temperature Storage temperature under bias Symbol VCC VT PT Topr Tstg Tbias Value -0.5 to +4.6 -0.5* to V CC+0.5* 1.0 0 to +70 -55 to +125 -10 to +85
1 2
Unit V V W C C C
Notes: 1. VT (min) = -2.0 V for pulse width (under shoot) 8 ns 2. VT (max) = VCC+2.0 V for pulse width (over shoot) 8 ns
Recommended DC Operating Conditions (Ta = 0 to +70C)
Parameter Supply voltage Symbol VCC* VSS * Input voltage VIH VIL Notes: 1. 2. 3. 4.
3 4
Min 3.0 0 2.2 -0.5*
1
Typ 3.3 0 -- --
Max 3.6 0 VCC + 0.5* 0.8
2
Unit V V V V
VIL (min) = -2.0 V for pulse width (under shoot) 8 ns VIH (max) = VCC+2.0 V for pulse width (over shoot) 8 ns The supply voltage with all VCC pins must be on the same level. The supply voltage with all VSS pins must be on the same level.
4
HM62W8511H Series
DC Characteristics (Ta = 0 to +70C, VCC = 3.3 V 0.3 V, VSS = 0V)
Parameter Input leakage current Output leakage current Operation power supply current Symbol Min IILII IILO I 12 ns cycle I CC -- -- -- Typ*1 -- -- -- Max 2 2 150 Unit A A mA Test conditions Vin = VSS to V CC Vin = VSS to V CC Min cycle CS = VIL, lout = 0 mA Other inputs = VIH/VIL
15 ns cycle I CC Standby power supply current 12 ns cycle I SB
-- --
-- --
130 60 mA Min cycle CS = VIH, Other inputs = VIH/VIL
15 ns cycle I SB I SB1
-- --
-- 0.05
50 5 mA f = 0 MHz VCC CS VCC - 0.2 V, (1) 0 V Vin 0.2 V or (2) VCC Vin VCC - 0.2 V
--* 2 Output voltage VOL VOH -- 2.4
0.05*2 -- --
1.0*2 0.4 -- V V I OL = 8 mA I OH = -4 mA
Notes: 1. Typical values are at VCC = 3.3 V, Ta = +25C and not guaranteed. 2. This characteristics is guaranteed only for L-version.
Capacitance (Ta = +25C, f = 1.0 MHz)
Parameter Input capacitance*
1 1
Symbol Cin CI/O
Min -- --
Typ -- --
Max 6 8
Unit pF pF
Test conditions Vin = 0 V VI/O = 0 V
Input/output capacitance* Note:
1. This parameter is sampled and not 100% tested.
5
HM62W8511H Series
AC Characteristics (Ta = 0 to +70C, VCC = 3.3 V 0.3 V, unless otherwise noted.)
Test Conditions * * * * Input pulse levels: 3.0 V/0.0 V Input rise and fall time: 3 ns Input and output timing reference levels: 1.5 V Output load: See figures (Including scope and jig)
3.3 V
Dout Zo=50 RL=50 1.5 V Output load (A)
319 Dout 353 5 pF
Output load (B) (for tCLZ, tOLZ, tCHZ, tOHZ, tWHZ, and tOW)
Read Cycle
HM62W8511H -12 Parameter Read cycle time Address access time Chip select access time Output enable to outpput valid Output hold from address change Chip select to output in low-Z Output enable to output in low-Z Chip deselect to output in high-Z Output disable to output in high-Z Symbol t RC t AA t ACS t OE t OH t CLZ t OLZ t CHZ t OHZ Min 12 -- -- -- 3 3 0 -- -- Max -- 12 12 6 -- -- -- 6 6 -15 Min 15 -- -- -- 3 3 0 -- -- Max -- 15 15 7 -- -- -- 7 7 Unit ns ns ns ns ns ns ns ns ns 1 1 1 1 Notes
6
HM62W8511H Series
Write Cycle
HM62W8511H -12 Parameter Write cycle time Address valid to end of write Chip select to end of write Write pulse width Address setup time Write recovery time Data to write time overlap Data hold from write time Write disable to output in low-Z Output disable to output in high-Z Write enable to output in high-Z Note: Symbol t WC t AW t CW t WP t AS t WR t DW t DH t OW t OHZ t WHZ Min 12 8 8 8 0 0 6 0 3 -- -- Max -- -- -- -- -- -- -- -- -- 6 6 -15 Min 15 10 10 10 0 0 7 0 3 -- -- Max -- -- -- -- -- -- -- -- -- 7 7 Unit ns ns ns ns ns ns ns ns ns ns ns 1 1 1 9 8 6 7 Notes
1. Transition is measured 200 mV from steady voltage with Load (B). This parameter is sampled and not 100% tested. 2. Address should be valid prior to or coincident with CS transition low. 3. WE and/or CS must be high during address transition time. 4. if CS and OE are low during this period, I/O pins are in the output state. Then, the data input signals of opposite phase to the outputs must not be applied to them. 5. If the CS low transition occurs simultaneously with the WE low transition or after the WE transition, output remains a high impedance state. 6. t AS is measured from the latest address transition to the later of CS or WE going low. 7. t WR is measured from the earlier of CS or WE going high to the first address transition. 8. A write occurs during the overlap of a low CS and a low WE. A write begins at the latest transition among CS going low and WE going low. A write ends at the earliest transition among CS going high and WE going high. tWP is measured from the beginnig of write to the end of write. 9. t CW is measured from the later of CS going low to the the end of write.
7
HM62W8511H Series
Timing Waveforms
Read Timing Waveform (1) (WE = VIH)
tRC
Address
Valid address tAA tACS tOH tCHZ
CS tOE OE tOLZ tCLZ Dout High Impedance Valid data tOHZ
Read Timing Waveform (2) (WE = VIH, CS = VIL , OE = VIL )
tRC
Address tOH Dout
Valid address tAA tOH
Valid data
8
HM62W8511H Series
Read Timing Waveform (3) (WE = VIH, CS = VIL , OE = VIL )*2
tRC CS tACS tCLZ Dout High Impedance Valid data High Impedance tCHZ
Write Timing Waveform (1) (WE Controlled)
tWC Address Valid address tAW OE tCW CS*3 tAS WE*3 tOHZ Dout High impedance*5 tDW Din *4 tDH *4 tWP tWR
Valid data
9
HM62W8511H Series
Write Timing Waveform (2) (CS Controlled)
tWC Address Valid address tCW CS *3 tAW tWP WE *3 tAS tWHZ Dout tOW High impedance*5 tDW Din *4 tDH *4 tWR
Valid data
10
HM62W8511H Series
Low VCC Data Retention Characteristics (Ta = 0 to +70C)
This characteristics is guaranteed only for L-version.
Parameter VCC for data retention Symbol VDR Min 2.0 Typ*1 -- Max -- Unit V Test conditions VCC CS VCC - 0.2 V (1) 0 V Vin 0.2 V or (2) VCC Vin VCC - 0.2 V VCC = 3 V, VCC CS VCC - 0.2 V (1) 0 V Vin 0.2 V or (2) VCC Vin VCC - 0.2 V See retention waveform
Data retention current
I CCDR
--
40
600
A
Chip deselect to data retention time Operation recovery time Note:
t CDR tR
0 5
-- --
-- --
ns ms
1. Typical values are at VCC = 3.0 V, Ta = +25C, and not guaranteed.
Low V CC Data Retention Timing Waveform
tCDR VCC 3.0 V VDR 2.2 V CS 0V VCC CS VCC - 0.2 V Data retention mode tR
11
HM62W8511H Series
Package Dimensions
HM62W8511HJP/HLJP Series (CP-36D)
Unit: mm
23.25 23.62 Max 36 19 10.16 0.13
1
3.50 0.26
0.74
18
2.85 0.12
1.30 Max
0.80 +0.25 -0.17
11.18 0.13
0.43 0.10 0.41 0.08
1.27
9.40 0.25
Hitachi Code JEDEC EIAJ Weight (reference value) CP-36D Conforms Conforms 1.4 g
0.10
Dimension including the plating thickness Base material dimension
12
HM62W8511H Series
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi's or any third party's patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party's rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi's sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi's sales office for any questions regarding this document or Hitachi semiconductor products.
Hitachi, Ltd.
Semiconductor & IC Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
URL
NorthAmerica : http:semiconductor.hitachi.com/ Europe : http://www.hitachi-eu.com/hel/ecg Asia (Singapore) : http://www.has.hitachi.com.sg/grp3/sicd/index.htm Asia (Taiwan) : http://www.hitachi.com.tw/E/Product/SICD_Frame.htm Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm Japan : http://www.hitachi.co.jp/Sicd/indx.htm For further information write to:
Hitachi Europe GmbH Electronic components Group Dornacher Strae 3 D-85622 Feldkirchen, Munich Germany Tel: <49> (89) 9 9180-0 Fax: <49> (89) 9 29 30 00 Hitachi Europe Ltd. Electronic Components Group. Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 778322 Hitachi Asia Pte. Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 049318 Tel: 535-2100 Fax: 535-1533 Hitachi Asia Ltd. Taipei Branch Office 3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105) Tel: <886> (2) 2718-3666 Fax: <886> (2) 2718-8180 Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Tsim Sha Tsui, Kowloon, Hong Kong Tel: <852> (2) 735 9218 Fax: <852> (2) 730 0281 Telex: 40815 HITEC HX
Hitachi Semiconductor (America) Inc. 2000 Sierra Point Parkway Brisbane, CA 94005-1897 Tel: <1> (800) 285-1601 Fax: <1> (303) 297-0447
Copyright (c) Hitachi, Ltd., 1998. All rights reserved. Printed in Japan.
13


▲Up To Search▲   

 
Price & Availability of HM62W8511H

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X